1. Field of the Invention
The present invention relates to a state model for a wireless communications device. In particular, the present invention discloses a finite state machine for the wireless device that includes a reset/suspend state.
2. Description of the Prior Art
Technological advances have moved hand in hand with more demanding consumer expectations. Devices that but ten years ago were considered cutting edge are today obsolete. These consumer demands in the marketplace spur companies towards innovation. The resulting technological advances, in turn, raise consumer expectations. Presently, portable wireless devices, such as cellular telephones, personal data assistants (PDAs), notebook computers, etc., are a high-growth market. However, the communications protocols used by these wireless devices are quite old. Consumers are demanding faster wireless access with greater throughput and flexibility. This has placed pressure upon industry to develop increasingly sophisticated communications standards. The 3rd Generation Partnership Project (3GPP(trademark)) is an example of such a new communications protocol.
The 3GPP(trademark) standard utilizes a three-layered approach to communications. Please refer to FIG. 1. FIG. 1 is a simplified block diagram of the prior art communications model. A prior art wireless system includes a first device 20 and a second device 30, both of which are in wireless communications with each other. As an example, the first device 20 may be a mobile unit, such as a cellular telephone, and the second device 30 may be a base station. An application 24 on the first device 20 needs to send data 24d to an application 34 on the second device 30. The application 24 connects with a layer 3 interface 23 (termed the radio resource control (RRC)), and passes the data 24d to the layer 3 interface 23. The layer 3 interface 23 uses the data 24d to form a layer 3 protocol data unit (PDU) 23p. The layer 3 PDU 23p includes a layer 3 header 23h and data 23d, which is identical to the data 24d. The layer 3 header 23h in the layer 3 PDU 23p contains information needed by the corresponding layer 3 interface 33 on the second device 30 to effect proper communications. The layer 3 interface 23 then passes the layer 3 PDU 23p to a layer 2 interface 22. The layer 2 interface 22 (also termed the radio link control (RLC)) uses the layer 3 PDU 23p to build one or more layer 2 PDUs 22p. Generally speaking, each layer 2 PDU 22p has the same fixed size. Consequently, if the layer 3 PDU 23p is quite large, the layer 3 PDU 23p will be broken into chunks by the layer 2 interface 22 to form the layer 2 PDUs 22p, as is shown in FIG. 1. Each layer 2 PDU 22p contains a data region 22d, and a layer 2 header 22h. In FIG. 1, the data 23d has been broken into two layer 2 PDUs 22p. Also note that the layer 3 header 23h is placed in the data region 22d of a layer 2 PDU 22p. The layer 3 header 23h holds no significance for the layer 2 interface 22, and is simply treated as data. The layer 2 interface 22 then passes the layer 2 PDUs 22p to a layer 1 interface 21. The layer 1 interface 21 is the physical interface, and does all the actual transmitting and receiving of data. The layer 1 interface 21 accepts the layer 2 PDUs 22p and uses them to build layer 1 PDUs 21p. As with the preceding layers, each layer 1 PDU 21p has a data region 21d and a layer 1 header 21h. Note that the layer 3 header 23h and layer 2 headers 22h are no more important to the layer 1 interface 21 than the application data 24d. The layer 1 interface 21 then transmits the layer 1 PDUs 21p to the second device 30.
A reverse process occurs on the second device 30. After receiving layer 1 PDUs 31p from the first device 20, a layer 1 interface 31 on the second device 30 removes the layer 1 headers 31h from each received layer 1 PDU 31p. This leaves only the layer 1 data regions 31d, which are, in effect, layer 2 PDUs. These layer 1 data regions 31d are passed up to a layer 2 interface 32. The layer 2 interface 32 accepts the layer 2 PDUs 32p and uses the layer 2 headers 32h to determine how to assemble the layer 2 PDUs 32p into appropriate layer 3 PDUs. In the example depicted in FIG. 1, the layer 2 headers 32h are stripped from the layer 2 PDUs 32p, leaving only the data regions 32d. The data regions 32d are appended to each other in the proper order, and then passed up to the layer 3 interface 33. The layer 3 interface 33 accepts the layer 3 PDU 33p from the layer 2 interface 32, strips the header 33h from the layer 3 PDU 33p, and passes the data region 33d to the application 34. The application 34 thus has data 34d that should be identical to the data 24d sent by the application 24 on the first device 20.
Please refer to FIG. 2 in conjunction with FIG. 1. FIG. 2 is simplified block diagram of a layer 2 PDU 40. The layer 2 PDU 40 has a layer 2 header 41 and a data region 45. As noted above, the data region 45 is used to carry layer 3 PDUs 23p received from the layer 3 interface 23. The layer 2 header 41 includes a data/control indicator bit 42, a sequence number field 43, and additional fields 44. The additional fields 44 are not of direct relevance to the present invention, and so will not be discussed. The data/control bit 42 is used to indicate if the layer 2 PDU 40 is a data PDU or a control PDU. Data PDUs are used to carry layer 3 data. Control PDUs are generated internally by the layer 2 interface 22, 32 and are used exclusively for signaling between the layer 2 interfaces 22 and 32, such as the passing of reset and reset acknowledgment signals. Control PDUs are thus never passed up to the layer 3 interface 23, 33. The sequence number field 43 contains a 12-bit or 7-bit value that is used to reassemble the layer 2 PDUs 40 into layer 3 PDUs 33p. Each layer 2 PDU 22p is transmitted with a successively higher value in the sequence number field 43, and in this manner the layer 2 interface 32 knows the correct ordering of received layer 2 PDUs 32p. 
Please refer to FIGS. 3 and 4 in conjunction with FIGS. 1 and 2. FIGS. 3 and 4 are state model diagrams of a prior art layer 2 interface. The prior art layer 2 interface 22, 32 is designed as a finite state machine. FIG. 3 depicts the state model for the layer 2 interface 22, 32 when a reset command is performed. FIG. 4 depicts the state model when a local suspend command is performed. Transitions between states are noted by arrows in FIGS. 3 and 4. Received signals associated with a state transition are noted above a horizontal line, and signals sent in response to the state transition are noted below the horizontal line. The layer 2 interface 22, 32 includes a null state 50, a data transfer ready state 52, a reset pending state 54 and a local suspend state 56. To explain these state models, the first device 20 will be used as an example. When the layer 2 interface 22 is in the null state 50, the layer 2 interface 22 has no established wireless channel 11 with the second device 30. The layer 2 interface 22 of the first device 20 thus cannot transmit any layer 2 PDUs 22p to the second device 30. When the application 24 determines that it wishes to send the data 24d to the application 34, the application 24 signals this intent to the layer 3 interface 23. The layer 3 interface 23 then performs whatever functions are necessary to establish the channel 11 with the second device 30. In particular, the layer 3 interface 23 sends an establish primitive to the layer 2 interface 22. On reception of the establish primitive, the layer 2 interface 22 transitions from the null state 50 to the data transfer state 52. In the process of doing so, the layer 2 interface 22 establishes the wireless channel 11 with the second device 30. While in the data transfer ready state 52, the first device 20 can freely transmit layer 2 PDUs 22p along the channel 11. At any time when the layer 2 interface 22 is in the data transfer state 52 and receives a release primitive from the layer 3 interface 23, the layer 2 interface 22 will transition back to the null state 50. In the process of doing so, the layer 2 interface 22 will close down the channel 11.
From time to time, the layer 2 interface 22 may determine that communications along the channel 11 are malfunctioning. In this case, the layer 2 interface 22 will desire to reset the communications system. To ensure that the entire system is reset, both the first device 20 and the second device 30 must be reset. To reset the second device 30, the layer 2 interface 22 generates a reset control PDU, and sends the reset control PDU along the channel 11 to the layer 2 interface 32 on the second device 30. The layer 2 interface 22 on the first device 20 then transitions from the data transfer state 52 to the reset pending state 54. While in the reset pending state 54, the layer 2 interface 22 will transmit no PDUs 22p to the second device 30 along the channel 11. This effectively halts communications along the channel 11. The layer 2 interface 22 remains in the reset pending state 54 until reception of a reset acknowledgment control PDU from the layer 2 interface 32 on the second device 30. This reset acknowledgment control PDU informs the layer 2 interface 22 that the layer 2 interface 32 received the reset control PDU and internally reset the layer 2 interface 32. When the layer 2 interface 22 receives the reset acknowledgment control PDU, the layer 2 interface 22 transitions from the reset pending state 54 to the data transfer ready state 52, and in the process of doing so resets the entire layer 2 state machine 22, such as flushing transmission and reception buffers, setting control variables to default values, etc. Communications along channel 11 are in this way reset back to default conditions so as to reestablish normal communications between the first device 20 and the second device 30. If at any time while the layer 2 interface 22 is in the reset pending state 54 and the layer 2 interface 22 receives a release primitive from the layer 3 interface 23, the layer 2 interface will transition to the null state 50. In the process of doing so, the layer 2 interface 22 will close down the channel 11. Also note that the layer 2 interface 22 may receive a reset control PDU from the layer 2 interface 32 of the second station 30 while in the data transfer ready state 52. Upon reception of such a layer 2 control PDU, the layer 2 interface 22 will internally reset the layer 2 interface state machine 22 for the channel 11, and then transmit a reset acknowledgment control PDU to the layer 2 interface 32. The layer 2 interface 22 remains, however, in the data transfer ready state 52 during this exchange.
The local suspend state 56 is used to temporarily halt the transfer of layer 2 PDUs 22p along the channel 11, and is initiated by a suspend-request primitive from the layer 3 interface 23. The primary purpose of the local suspend state 56 is to ensure a proper ciphering configuration change between the first device 20 and the second device 30 along the channel 11. At any time while in the data transfer ready state 52, the layer 2 interface 22 may transition to the local suspend state 56 upon reception of the suspend-request primitive from the layer 3 interface 23. The suspend-request primitive contains a variable N 56n, which indicates a sequence number value 43. While in the local suspend state 56, the layer 2 interface 22 may transmit along channel 11 layer 2 PDUs 22p with sequence number values 43 that are sequentially before a value indicated by N 56n. Any layer 2 PDU 22p having a sequence number value 43 that is sequentially after the value indicated by N 56n will not be transmitted by the layer 2 interface 22p along the channel 11. Upon reception of a resume primitive from the layer 3 interface 23, the layer 2 interface 22 will transition from the local suspend state 56 back to the data transfer ready state 52.
The prior art state models of FIGS. 3 and 4 cannot account for transitions between the local suspend state 56 and the reset pending state 54, although such transitions are assumed possible. For example, it is not difficult to imagine a situation arising in which, while the layer 2 interface 22 is in the local suspend state 56, the layer 2 interface 22 detects a communications error along the channel 11 and desires to initiate a reset procedure. Sending a reset control PDU to the second device 30 along the channel 11 would force the layer 2 interface 22 to transition into the reset pending state 54 to await the resulting reset acknowledgment control PDU from the layer 2 interface 32 of the second device 30. According to the state model of FIG. 3, reception of the reset acknowledgment control PDU should cause the layer 2 interface 22 to transition into the data transfer ready state 52. This would be incorrect in this situation, however, as the layer 2 interface should more properly return back to the local suspend state 56. To properly implement the prior art state model, the reset pending state 54 and the local suspend state 56 cannot be xe2x80x9cmemorylessxe2x80x9d states, but must remember from which state they transitioned so as to properly return to that state. Generally speaking, a proper state model should have no hysteresis, i.e., the reaction of a state to inputs should not depend upon past reactions but only upon the present inputs, as this leads to a simpler and more consistent implementation. Internal consistency is essential to avoid programming bugs arising from unexpected state interactions within the model.
It is therefore a primary objective of this invention to provide a wireless communications device with a state model having a reset/suspend state to provide internal consistency to the state model, and to avoid previous state memory requirements of the state model.
Briefly summarized, the preferred embodiment of the present invention discloses a wireless communications device that transacts muti-layered communications with a second wireless device. The wireless communications device has a processor, and a program in memory that is executed by the processor to effect a multi-layered communications protocol. The multi-layered communications protocol has a layer 3 interface in communications with a layer 2 interface. The layer 2 interface transmits and receives layer 2 communications data. The layer 2 interface utilizes a null state, a data transfer state, a reset pending state, a local suspend state and a reset/suspend state. While in the null state, the layer 2 interface has no established layer 2 wireless connection with the second wireless device. While in the data transfer state, the layer 2 interface is in wireless communications with a layer 2 interface on the second wireless device and transmits the layer 2 communications data to the layer 2 interface on the second wireless device. The processor switches from the null state to the data transfer state according to an establish primitive from the layer 3 interface, and switches from the data transfer state to the null state according to a release primitive from the layer 3 interface. While in the reset pending state, the layer 2 interface is in wireless communications with the layer 2 interface on the second wireless device and the transmission of the layer 2 communications data is halted. The processor switches from the data transfer state to the reset pending state when a protocol error is found by the layer 2 interface, switches from the reset pending state to the data transfer state according to a reset acknowledge signal received from the second wireless device, and switches from the reset pending state to the null state according to the release primitive from the layer 3 interface. While in the local suspend state, the layer 2 interface is in wireless communications with the layer 2 interface on the second wireless device and halts the transmission of the layer 2 communications data after a predetermined event indicated by the layer 3 interface. The processor switches from the data transfer state to the local suspend state according to a suspend primitive from the layer 3 interface, switches from the local suspend state to the data transfer state according to a resume primitive from the layer 3 interface, and switches from the local suspend state to the null state according to the release primitive from the layer 3 interface. Finally, while in the reset/suspend state, the layer 2 interface is in wireless communications with the layer 2 interface on the second wireless device and the transmission of the layer 2 communications data is halted. The processor switches from the reset/suspend state to the reset pending state according to the resume primitive from the layer 3 interface, switches from the reset pending state to the reset/suspend state according to the suspend primitive from the layer 3 interface, switches from the reset/suspend state to the local suspend state according to the reset acknowledge signal received from the second wireless device, switches from the local suspend state to the reset/suspend state when a protocol error is found by the layer 2 interface, and switches from the reset/suspend state to the null state according to the release primitive from the layer 3 interface.
It is an advantage of the present invention that by providing the reset/suspend state, the state machine of the layer 2 interface requires no memory of previous states when transitioning to subsequent states. The state model is thus more internally consistent, and therefore easier to implement and less likely to be error-prone.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment, which is illustrated in the various figures and drawings.